2023

• “Carbon Nanotubes—Unique Properties, Electronic Applications and Challenges,” Tutorial at 2023 MRS Fall Meeting, Boston, MA, November 2023.
• “Electrochemical Transistor Array for Deep Learning Accelerators” at 2023 Non-Volatile Memory Technology Symposium (NVMTS 2023), Leuven (IMEC), Belgium, August 2023.

2022

• “Two-Dimensional Amorphous Carbon Prepared from Solution Precursor As Novel Dielectrics for Nanoelectronics,” at 2022 MRS Fall Meeting, Boston, MA, November 2022.
• “Two-Dimensional Amorphous Carbon Prepared from Solution Precursor As Novel Dielectrics for Nanoelectronics,” at 241st ECS Meeting, Vancouver, BC, Canada, May 2022.
• “Future Nanoelectronics Based on Carbon Nanomaterials,” at 2022 Sigma Xi Monie Ferst Award Symposium, Atlanta, GA, March 2022.
• ” Nanocarbon Materials for Future High-Performance Electronics,” at 2022 TMS Annual Meeting & Exhibition, Anaheim, CA, February 2022.

2021

• “Carbon nanotube transistors for future technology nodes,” at 2021 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), Hsinchu, Taiwan, April 2021.

2020

• “Replacing Silicon with Carbon Nanotubes in Logic Transistors,” at 2020 International Conference on Nano/Micro Engineered and Molecular Systems (IEEE-NEMS), September 2020.
• “Expanding the Frontiers of Electronics with Material Innovations,” at Taiwan Semiconductor Manufacturing Company (TSMC), July 2020.
• “Carbon nanotube transistor technology,” at Nano and Functional Materials seminar, University of Manchester, June 2020.
• “New materials and devices beyond silicon and field-effect transistors,” at 2020 TMS Annual Meeting & Exhibition, San Diego, CA, February 2020.
• “Carbon nanotube transistor technology: the past, the present, the future,” at the 2020 Lawrence Symposium on Epitaxy, Scottsdale, AZ, February 2020.

2019

• “Electronics for the next 50 years,” at Argonne National Laboratory, Lemont, IL, October 2019.

2018

• “Carbon nanotube transistor technology for extremely-scaled logic devices,” at University of Southern California, Los Angles, CA, November 2018.
• “Carbon nanotube transistor technology for extremely-scaled logic devices,” at University of Maryland, College Park, MD, November 2018.

2017

• “Carbon nanotube transistor technology for extremely-scaled logic devices,” at Center for Nanoscale Systems, Harvard University, Boston, MA, October 2017.
• “Carbon Nanotube for Extremely Scaled Logic Transistors to the End of the Technology Roadmap,”  at the 18^th International Conference on the Science and Application of Nanotubes and Low-dimensional Materials, Belo Horizonte, Brazil, June 2017.
• “Carbon Nanotube Transistor Technology for the 5 nm Technology Node and Beyond,” at the Nanotech 2017 Conference and Expo, Washington, DC, May 2017.

2016

• “Extending Moore’s law with carbon nanotube transistors,” at 2016 TTI/Vanguard [Next] Conference, San Francisco, CA, December 2016.
• “High-performance logic electronics based on carbon nanotubes for 5nm technology node and beyond,”  at the Materials Research Society 2016 fall Meeting, Boston, MA, November 2016.
• “Recent progress on high performance logic electronics based on carbon nanotubes,” at the 2016 Annual Convention of Chinese Institute of Engineers-USA Greater New York Chapter, Flushing, NY October 2016.
• “Carbon nanotube transistor technology for scaling beyond Si CMOS,”  at the 48^th International Conference on Solid State Devices and Materials (SSDM), Tsukuba, Japan, September, 2016.
• “Carbon nanotube transistor technology for scaling beyond Si CMOS,” at the University of Illinois at Urbana-Champaign, Urbana, IL, January, 2016.

2015

• “The Threshold Voltage Variability of Quasi-Ballistic Carbon Nanotube Transistors,”  at the 9th Energy, Materials, and Nanotechnology (EMN) Meeting, Las Vegas, NV, November 2015.

2014

• “Ultrahigh density arrays of semiconducting nanotubes for high performance logic electronics,”  at the 8th Energy, Materials, and Nanotechnology (EMN) Meeting, Orlando, FL, November 2014.
• “High density semiconducting nanotube arrays for high performance electronics” at the 51^st Annual Technical Meeting of the Society of the Engineering Sciences, West Lafayette, IN, October 2014.
• “En route toward high performance electronics based on single-walled carbon nanotubes” at the SPIE: Defense + Security, Baltimore, MD, May 2014.

2013

• “Full-coverage semiconducting nanotube arrays for high performance electronics” at the 7th International Conference on Materials for Advanced Technologies (ICMAT13), Singapore, July 2013.
• “Carbon nanotubes for high-performance logic electronics”, key note lecture at the Fourteenth International Conference on the Science and Application of Nanotubes (NT13), Helsinki, Finland, June 2013.